Design and implementation of iris recognition system using FPGA
Keywords:
Canny edge detection (CED); Circular Hough transform (CHT); RED algorithm; HD; Field-programmable gate array (FPGA) spartan 6.Abstract
Iris recognition systems apply mathematical pattern recognition techniques to identify the individual person. It plays an
important role in biometric purposes because of the fact that features inside iris never changes with the years. The
architecture design of the iris recognition consists of segmentation, normalization, features extraction, and matching. The
algorithm that used for segmentation is Canny Edge Detector algorithm and Circle Hough Transform algorithm. Ridge
Energy Direction (RED) is used for iris features extraction and Hamming Distance is used for matching between irises.
Field Programmable Gate Array (FPGA) is used to reduce the execution time of iris recognition compare to Central
Processing Unit (CPU). FPGA enables the algorithms of the iris recognition to work in parallel and reducing the required
time for identification. The reducing time execution made for segmentation, normalization, features extraction, and
matching when using FPGA compared using CPU. There is reduction in the power consumption by 3% and area by 4%.
Speed of execution is enhanced by 3.15% and the minimum input arrival time before clock is 5.754ns.
